Presentations and Invited Talks

  • Hosted workshop on Exascale Simulation of Next-Generation Computing Architectures, IISWC, 2023.
  • LaTeX Workshop, supported by NTU Library, November, 2018.
  • Invited talk on “General purpose logic-in-memory architecture using Resistive RAM (ReRAM) at Advanced Computing & Microelectronics Unit, Indian Statistical Institute, Kolkata, India in October, 2018.
  • LaTeX Workshop, supported by NTU GSA Career Committee, August, 2018.
  • LaTeX Workshop, supported by NTU GSC Academic Events Committee, March, 2018.
  • Technology-aware Logic Synthesis For ReRAM Based In-memory Computing in DATE 2018, Dresden, Germany.
  • Enabling Logic-in-Memory using Resistive RAM (ReRAM) at Department of Computer Science & Engineering, IIT Kharagpur, India in February, 2018.</em>
  • Delay-Optimal Technology Mapping for In-Memory Computing using ReRAM Devices. in The {IEEE/ACM} International Conference on Computer-Aided Design (ICCAD), 2016.
  • Efficient Hardware Accelerator for AEGIS-128 Authenticated Encryption in Final Year Project Presentation, Live Demo and Graduate Students Workshop, IEEE Circuits and Systems Society events, 2015.
  • Efficient Hardware Accelerator for AEGIS-128 Authenticated Encryption in DIAC 2015.

Activities

  • TPC member of Neural Networks and Deep Learning track in ICCAD 2022
  • Quantum Computing Co-Chair for DAC 2022.
  • TPC member of ASP­DAC 2020, 2021.
  • Reviewer of IEEE Transactions on Nanotechnology
  • Reviewer of IEEE Transactions on Computer­Aided Design of Integrated Circuits and Systems
  • Reviewer of IEEE Design & Test
  • Reviewer of IEEE Transactions on Very Large Scale Integration Systems
  • Reviewer of Integration, the VLSI Journal
  • Reviewer of ACM Journal on Emerging Technologies in Computing Systems (JETC)

Teaching

Post­graduate courses

  • Algorithms to Architecture [Tutorials + Labs] [2017, 2018, 2019]
    • Conducted labs and tutorials to teach optimization of algorithms for hardware implementation.
    • Tools used: Xilinx ISE, Vivado HLS.
  • Electronic Design Automation [Tutorials + Labs] [2016, 2017]
    • Conducted labs and tutorials for teaching design automation principles, such as HLS, logic synthesis, etc.
    • Tools used: Vivado HLS, Synopsis DC.

Undergraduate courses

  • Advanced Computer Architecture [Labs] [Jan­June, 2017]
    • Guided students of FPGA implementation of MIPS architecture.
    • Tools used: Xilinx ISE, ISim

Participation

  • Participated in the Lean Launchpad Program, NUS, 2018
  • Finalist in NTU Hackathon on Digital Economy and Services, 2015.
  • Finalist in Intel Singapore Invent 50 Competition, 2015.

Volunteering Experience

  • Sub-committee member of NTU GSA - Career Committee, 2018-19
  • Sub-committee member of NTU GSC - Academic Events Committee, 2017-18
  • Sub-committee member of NTU GSC - Welfare and Feedback Committee, 2016-17